The present invention relates to a flash memory device, and more particularly to a voltage converter circuit for providing an operation voltage to a flash memory device which has a reduced circuit area.
Recently, as demand for mobile devices such as a camcoder, digital camera, cellular phone, MP3 (MPEG-1 Layer3) player, etc., increases, efforts for improving operation performance of mobile devices have been made.
Since mobility of the mobile devices themselves is important, they are made to be portable and thus power is supplied to them via battery, etc. Accordingly, for improving the portability of the mobile devices, they tend to be designed lighter and to consume less power for lengthening their operation time period. External voltage (VCC) supplied by the mobile device is inputted to the flash memory device having a voltage down converter (VDC) and a flash memory chip. The VDC reduces the external voltage (VCC) and converts it to a voltage suitable for operating the flash memory chip.
FIG. 1A is a block diagram illustrating a flash memory device.
Referring to FIG. 1A, the flash memory 100 includes a voltage down converter (VDC) 110 for lowering an external voltage VCC input from an external source, e.g., from a mobile phone. The lowered voltage is provided to a flash memory chip 130 for its operation.
FIG. 1B is a block diagram of the VDC 110 of FIG. 1A.
Referring to FIG. 1B, a voltage down converter 110 includes a reference voltage generation unit 111 for outputting a reference voltage having a substantially constant level using an external voltage VCC, and a driver unit 112 for providing a voltage according an operation mode using the reference voltage output by the reference voltage generation unit 111.
The reference voltage output by the reference voltage generation unit 111 is substantially constant regardless of variation in the external voltage VCC. The driver unit 112 generates and outputs the voltage for operation of the flash memory chip using the reference voltage output by the reference voltage generation unit 111.
The reference voltage generation unit 111 is designed to ensure stability for Process, Voltage and Temperature (PVT) in order to output the reference voltage of a constant level (or uniform level).
FIG. 1C illustrates more detailed circuit diagrams of the reference voltage generation unit 111 and the driver unit 112. The reference voltage generation unit 111 includes an active reference voltage generation unit 114 for providing an active reference voltage in an active mode, and a standby reference voltage generation unit 115 for providing a standby reference voltage in a standby mode. The active reference voltage generation unit 114 includes a first comparator COM1 and a voltage driver 113.
The driver unit 112 includes an active voltage provision unit 116 for outputting a voltage VDC according to the active reference voltage VINT_REF provided by the standby reference voltage generation unit 114, and a standby voltage provision unit 117 for outputting a voltage VDC during the standby mode using the standby reference voltage STBY_REF output by the standby reference voltage generation unit 115. The active voltage provision unit 116 includes a second comparator COM2, a PMOS transistor P, and first and second diodes D1 and D2.
A background voltage VBG provided by the flash memory chip is input to the inverse terminal (−) of the first comparator COM1 of the active reference voltage generation unit 114. A feedback voltage Vfb input from the voltage driver 113 is input to the non-inverse terminal (+) of the first comparator COM1. The first comparator COM1 outputs a control voltage VREG based on the difference between the input voltages. The control voltage VREG is input to the voltage driver 113.
The voltage driver 113 receives the control voltage VREG provided by the first comparator COM1 and outputs the active reference voltage VINT_REF needed in the active mode. In this case, the voltage driver 113 delivers the active reference voltage output to the first comparator COM1 as the feedback voltage Vfb to output the control voltage VREG so as to output the uniform reference voltage.
A test bit decoder 118 provides a test bit for controlling the reference voltage output to the voltage driver 113 based on the characteristics and peripheral circumstance of the flash memory device 100.
The standby reference voltage generation unit 115 starts to operate according to a Power On Reset (POR) signal for initiating the operation of the flash memory device 100, and outputs the standby reference voltage STBY_REF provided in the standby mode. In this case, the standby mode refers to a state where the power supply turns on, and the chip waits for operation before substantial operation is started. The standby reference voltage generation unit 115 includes circuits similar to those of the active reference voltage generation unit 115. Since the magnitudes of voltages required for the active mode and the standby mode are different from each other, the specifications for the modes are different, so that the standby and active reference voltage generation units are separately configured using devices having different characteristics.
That is, the standby reference voltage generation unit 115 is designed as a circuit having rapid response time and low current consumption, such as a Widlar Reference Circuit, and the active reference voltage generation unit 115 is designed as a circuit which is less influenced from PVT circumstances rather than current consumption.
The flash memory device 100 requires little current in a standby state (e.g., about 10 uA) because the device is not operated. During an active state, a current in the hundreds of uA to dozens of mA is consumed. In this case, operation means operations performed on the flash memory device, e.g., programming data in the flash memory device 100, reading the data, or the like.
The active reference voltage VINT_REF output by the active reference voltage generation unit 114 is input to the non-inverse terminal (+) of the second comparator COM2 of the active voltage provision unit 116. A signal at a node K2 is input to the inverse terminal (−) of the second comparator COM2.
The second comparator COM2 outputs a control signal based on voltage difference between signals input to the inverse and non-inverse terminals. The control signal output by the second comparator COM2 is input to the gate of the PMOS transistor P. The PMOS transistor P is coupled between a power supply voltage and the node K1 and outputs the power supply voltage according to the voltage level of the control signal input to the gate thereof.
First and second diodes D1 and D2 are provided between the node K1 and a ground node and connected to each other at the node K2. The node K2 is coupled to the inverse terminal (−) of the second comparator COM2. The active voltage VDC is output through the node K1.
In this case, the second comparator COM2 is operated by an active enable control signal ENABLE_ACT. When the active mode is begun, the active voltage provision unit 116 is operated by receiving the active enable control signal ENABLE_ACT, thereby providing the active voltage.
The standby voltage provision unit 117 includes circuits similar to those of the active voltage provision unit 117, and is configured to use devices suitable to characteristics according the magnitude of the output voltage. The standby voltage provision unit 117 is operated when a standby enable signal ENABLE_STBY is received.
FIG. 1D is the operation timing diagram of FIG. 1B.
The operation of the VDC 110 of FIG. 1B is described below. When the active enable control signal ENABLE_ACT is at a low level, and the standby enable control signal ENABLE_STBY is at a high level, the standby voltage provision unit 117 is operated.
Furthermore, when the standby enable control signal ENABLE_STBY is at a low level, and the active enable control signal ENABLE_ACT is at a high level, the active voltage provision unit 116 is operated.
As describe above, the magnitudes of currents required for the active mode and the standby mode are different from each other, so that different reference voltage provision circuits are provided according to specs. Accordingly, the active reference voltage generation unit 114 and the standby reference voltage generation unit 115 are separately configured, which requires the use of more area.